The present invention relates to a method for manufacturing a semiconductor device and, more particularly, to an improvement in an element isolation technique in the manufacture of integrated circuits (ICs).
In the field of integrated circuits, semiconductor elements are more micronized recently. Along with this tendency, various element isolation techniques have been developed. A method is known which forms an insulating material on the selectively etched portion of the semiconductor substrate to isolate elements. However, the above method has the following drawbacks.
Such drawbacks will be described in detail with reference to FIGS. 1 and 2. FIG. 1 is a plan view of a MOSFET, and FIG. 2 is a sectional view thereof taken along the line II--II of FIG. 1. A semiconductor substrate 1 comprises p-type silicon. An island element region which is isolated by a thick silicon oxide layer 2 is formed on the p-type semiconductor substrate 1. N-type source and drain regions 3 and 4 which are electrically insulated from each other are formed in the element region. A p-type channel region 5 is formed between the n-type source and drain regions 3 and 4. A gate electrode 7 of polycrystalline silicon is deposited on the channel region 5 through a gate oxide layer 6. It is noted that the element region of the p-type semiconductor substrate 1 formed by etching to extend above the level of the other surface portions, and the silicon oxide layer 2 is formed to surround the element region.
In the operation of the MOSFET with the above arrangement, when an input voltage is applied across the gate electrode 7 to generate an electric field, a channel is formed on the surface of the channel region 5 of the p-type semiconductor substrate 1 beneath the gate oxide layer 6 so as to transmit the signal. However, since the element region extends above the surface of the p-type semiconductor substrate 1, a parasitic channel is formed due to various causes on side surfaces which connect the n-type source and drain regions 3 and 4. Generally, in order to prevent a parasitic channel, a highly concentrated impurity is doped therein. For this purpose, various methods such as gas-phase or solid-phase diffusion method may be adopted to increase the concentration of the impurity in side surfaces 8. However, in a channel-cut region which functions as the channel stopper of a MOSFET, the amount of the impurity must be precisely controlled. In this sense, ion-implantation is the best method to increase the concentration of the impurity. However, ion-implantation has directivity. As shown in FIG. 3, the p-type semiconductor substrate 1 is selectively etched to expose a portion thereof, using a mask member 9 which comprises a resist material and which has a predetermined shape. Thereafter, a p-type impurity such as boron is ion-implanted perpendicularly to one major surface of the p-type semiconductor substrate 1 to form
.sup.+ -type channel-cut regions 10 in the etched bottom portions. However, channel-cut regions are not formed on the side surfaces 8 of the element region. In order to form p.sup.30 -type channel-cut regions on the side surfaces 8 of the element region, as shown in FIG. 4, the impurity must be ion-implanted obliquely with respect to one major surface of the semiconductor substrate 1. Thus, channel-cut regions 10' are formed respectively on the side surfaces 8 of the element region. However, the side surfaces of the element region which extend above other surface portions of the semiconductor substrate are oriented in various directions in an integrated circuit. Therefore, it is not desirable to ion implant the impurity obliquely in mass production.